BOOK

  1. J. M. Rabaey, A. Chandrakasan, B. Nikolic, Digital Integarted Circuits: A Design Perspective, 2nd edition, Prentice-Hall, 2003.

JOURNAL AND CONFERENCE PUBLICATIONS
  1. B. Nikolic, L. Chang, T.-J. King, "Performance of Deeply-Scaled, Power-Constrained Circuits," to be presented at the 2003 International Conference on Solid-State Devices and Materials, Tokyo, Japan, September 16-18, 2003.

  2. R. Zlatanovici, B. Nikolic, "Power-Performance Optimal 64-bit Carry-Lookahead Adders," to be presented at the 29th European Solid-State Circuits Conference, Estoril, Portugal, September 16-18, 2003.

  3. F. Ishihara, F. Sheikh, B. Nikolic, "Level Conversion for Dual Supply Systems," Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED'03, Seoul, Korea, August 25-27, 2003. pp. 164-167.

  4. R. Lynch, E. Kurtas, A. Kuznetsov, E. Yeo, B. Nikolic, "The Search for a Practical Iterative Decoder for Magnetic Recording," Digests of the 2003 Magnetic Recording Conference, TMRC'03, Santa Clara, CA, August 18-20, 2003.

  5. E. Yeo, B. Nikolic, V. Anantharam, "Iterative Decoder Architectures," IEEE Communications Magazine, vol. 41, no.8, pp. 132-140, August 2003.

  6. E. Yeo, S. Augsburger, W.R. Davis, B. Nikolic, "A 500Mb/s Soft-Output Viterbi Decoder," IEEE Journal of Solid-State Circuits, vol. 38, no. 7, pp. 1234-1241, July 2003.

  7. S. Balasubramanian, L. Chang, B. Nikolic, T.-J. King, "Circuit-Performance Implications for Double-Gate MOSFET Scaling Below 25nm," 2003 Silicon Nanoelectronics Workshop, Kyoto, Japan, June 8-9, 2003.

  8. Y. Shimazaki, R. Zlatanovici, B. Nikolic, "A Shared-Well Dual-Supply-Voltage 64-bit ALU," 2003 IEEE International Solid-State Circuits Conference, ISSCC'03, Digest of Technical Papers, San Francisco, CA, February 9-13, 2003, pp. 104-105, 481.

  9. R.W. Brodersen, M.A. Horowitz, D. Markovic, B. Nikolic, V. Stojanovic, "Methods for True Power Minimization," International Conference on Computer-Aided Design, ICCAD-2002, Digest of Technical Papers, San Jose, CA, November 10-14, 2002, pp. 35-42. (invited).

  10. E. Yeo, S. Augsburger, W.R. Davis, B. Nikolic, "Implementation of High-Throughput Soft-Output Viterbi Decoders," IEEE Workshop on Signal Processing Systems, SIPS'02, San Diego, CA, October 16-18, 2002.

  11. V. Stojanovic, D. Markovic, B. Nikolic, M.A. Horowitz, R.W. Brodersen, "Energy-Delay Tradeoffs in Combinational Logic using Gate Sizing and Supply Voltage Optimization," Proceedings of the 28th European Solid-State Circuits Conference, ESSCIRC'2002, Florence, Italy, September 24-26, 2002. pp. 211-214.

  12. E. Yeo, S. Augsburger, W.R. Davis, B. Nikolic, "A 500Mb/s Soft-Output Viterbi Decoder," Proceedings of the 28th European Solid-State Circuits Conference, ESSCIRC'2002, Florence, Italy, September 24-26, 2002. pp. 523-526.

  13. S. Augsburger, B. Nikolic, ""Reducing Power with Dual-Supply, Dual-Thresholds and Transistor Sizing," Proceedings IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD'02, Freiburg, Germany, September 16-18, 2002.

  14. E. Yeo, B. Nikolic, V. Anantharam, ""Architectures and Implementation of Low-Density Parity-Check Decoding Algorithms," 45th IEEE Midwest Symposium on Circuits and Systems, MWSCAS 2002, Tulsa OK, August 4-7, 2002. (invited).

  15. W.R. Davis, N. Zhang, K. Camera, D. Markovic, T. Smilkstein, M.J. Ammer, E. Yeo, S. Augsburger, B. Nikolic, R.W. Brodersen, "A Design Environment for High Throughput, Low Power Dedicated Signal Processing Systems," IEEE Journal of Solid-State Circuits, vol.37, no.3, pp. 420-431, March 2002.

  16. E. Yeo, P. Pakzad, B. Nikolic, V. Anantharam, "High Throughput Low-Density Parity-Check Decoder Architectures," Proceedings 2001 Global Conference on Communications, Globecom'01, San Antonio, TX, November 25-29, 2001. pp. 3019-3024.

  17. D. Petrovic, B. Nikolic, K. Ramchandran, "List Viterbi Decoding with Continuous Error Detection for Magnetic Recording Channels," Proceedings 2001 Global Conference on Communications, Globecom'01, San Antonio, TX, November 25-29, 2001. pp. 3007-3011.

  18. W.R. Davis, N. Zhang, K. Camera, D. Markovic, T. Smilkstein, N. Chan, M.J. Ammer, E. Yeo, B. Nikolic, R.W. Brodersen, "An Automated Design Flow for Low-Power, High-Throughput Dedicated Signal Processing Systems," Thirty-Fifth Asilomar Conf. on Signals, Systems and Computers, Conf. Record, vol. 1, Pacific Grove, CA, November 4-7, 2001. pp.475-480.

  19. D. Markovic, B. Nikolic, R.W. Brodersen, "Analysis and Design of Low-Energy Flip-Flops," Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED'01, Huntington Beach, CA, August 6-7, 2001, pp.52-55.

  20. D. Chinnery, B. Nikolic, K. Keutzer, "Achieving 550MHz in an ASIC Methodology," Proceedings of the 38th Design Automation Conference, DAC'2001, Las Vegas, NV, June 18-22, 2001, pp. 420-425.

  21. W.R. Davis, N. Zhang, K. Camera, F. Chen, D. Markovic, N. Chan, B. Nikolic, R.W. Brodersen, "A Design Environment for High Throughput, Low Power, Dedicated Signal Processing Systems," Proceedings of the IEEE Custom Integrated Circuits Conference, CICC'2001, San Diego, CA, May 6-9, 2001. pp. 545-548.

  22. B. Nikolic, M. Leung, L. Fu, "Rate 8/9 Distance-Enhancing Code with Stationary Detector," IEEE Transactions on Magnetics, vol.37, no.3, pp. 1168-1174, May 2001.

  23. M. Leung, B. Nikolic, L. Fu, T. Jeon, "Reduced Complexity Sequence Detection for Higher Order Partial Response Channels", IEEE Journal of Selected Areas in Communications, vol.19, no.4, pp.649-661, April 2001.

  24. E. Yeo, P. Pakzad, B. Nikolic, V. Anantharam, "VLSI Architectures for Iterative Decoders in Magnetic Recording Channels," IEEE Transactions on Magnetics, vol.37, no.2, pp.748-755, March 2001.

  25. J.L. da Silva, Jr, J. Shamberger, M.J. Ammer, C. Guo, S.-F. Li, R. Shah, T.Tuan, M. Sheets, J.M. Rabaey, B. Nikolic, A. Sangiovanni-Vincentelli, P. Wright, "Design Methodology for PicoRadio Networks," Design, Automation and Test in Europe, DATE'2001, Munich, Germany, March 13-16, 2001, pp.314-323.

  26. D. Markovic, B. Nikolic, V.G. Oklobdzija, "A General Method in Synthesis of Pass-Transistor Circuits," Microelectronics Journal, vol. 31, no. 11-12, pp. 991-998, November 2000.

  27. D. Maksimovic, V. Oklobdzija, B. Nikolic, K.W. Current, "Clocked CMOS Adiabatic Logic with Integrated Single-Phase Power-Clock Supply ," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.8, no.4, pp. 460-463, August, 2000.

  28. E. Yeo, P. Pakzad, B. Nikolic, V. Anantharam, "VLSI Architectures for Iterative Decoders in Magnetic Recording Channels," Digests of The Magnetic Recording Conference, TMRC 2000, on Magnetic Recording Systems, Santa Clara, CA, August 14-16, 2000, p. E6.

  29. B. Nikolic, V. Stojanovic, V.G. Oklobdzija, W. Jia, J. Chiu, M. Leung,"Improved Sense Amplifier-Based Flip-Flop: Design and Measurements," IEEE Journal of Solid State Circuits, vol. 35, no.6, pp.876-884, June 2000.

  30. J. Popovic, B. Nikolic, K. W. Current, A. Pavasovic, D. Vasiljevic, "Low-Power CMOS RC Oscillators Based on Current Conveyors," Proceedings of the 22nd IEEE International Conference on Microelectronics, MIEL '2000, Nis, Yugoslavia, May 14-17, 2000, pp.691-694.

  31. D. Markovic, B. Nikolic, V.G. Oklobdzija, "General Method in Synthesis of Pass-Transistor Circuits," Proceedings of the 22nd IEEE International Conference on Microelectronics, MIEL '2000, Nis, Yugoslavia, May 14-17, 2000, pp. 695-698.

  32. B. Nikolic, M. Leung, L. Fu, V.G. Oklobdzija, R. Yamasaki, "Reduced Complexity Sequence Detection for E2PR4 Magnetic Recording Channel," 1999. IEEE Global Conference on Communications, GLOBECOM'99, Conference Record, vol. 1, part B, Rio de Janeiro, Brazil, December 5-9, 1999, pp. 960-964.

  33. B. Nikolic, V.G. Oklobdzija, "Design and optimization of sense amplifier-based flip-flops," Proceedings of the 25th European Solid-State Circuits Conference, ESSCIRC'99, Duisburg, Germany, September 21-23, 1999, pp. 410-413.

  34. B. Nikolic, M. Leung, L.Fu, "A Rate 8/9 Sliding Block Code with Stataionary Detector for Magnetic Recording," Proceedings 1999 International Conference on Communication, ICC'99, vol. 3, Vancouver, BC, Canada, June 6-10, 1999, pp. 1653-1657.

  35. B. Nikolic, V. Stojanovic, V.G. Oklobdzija, W. Jia, J. Chiu, M. Leung, "Sense Amplifier-Based Flip-Flop," 1999 IEEE International Solid-State Circuits Conference, ISSCC'99, Digest of Technical Papers, San Francisco, CA, February 15-17, 1999, pp. 282-283, 468.

  36. J. Popovic, B. Nikolic, K. W. Current, A. Pavasovic, D. Vasiljevic, "CMOS Implementation of Low-power Oscillators Based on the Modified Fabre-Normand Current Conveyor," Proceedings 1998. International Conference on Electronics, Circuits and Systems, ICECS-98, vol 2, Lisbon, Portugal, September 7-10, 1998, pp. 349-352.

  37. B. Nikolic, S. Marjanovic, "A General Method of Feedback Amplifier Analysis," Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (ISCAS’98), vol. III, Monterey, CA, May 31 - June 3, 1998, pp. 415-418.

  38. B.Nikolic, V.G. Oklobdzija, "Low Voltage BiCMOS TSPC Latch for High Performance Digital Systems, " Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (ISCAS’98), vol. II, Monterey, CA, May 31 - June 3, 1998, pp. 53-56.

  39. D. Maksimovic, V. Oklobdzija, B. Nikolic, K.W. Current, "Clocked CMOS Adiabatic Logic with Integrated Single-Phase Power-Clock Supply: Experimental Results," Proceedings 1997. International Symposium on Low-Power Electronics and Design, Monterey, CA, August 18-20, 1997, pp. 323-327. Reprinted in High-Performance System Design: Circuits and Logic, IEEE Press 1999.

  40. B. Nikolic, V. Oklobdzija, "A Single-Phase Clock High-Performance BiCMOS Latch, "7th International Symposium on IC Technology, Systems, & Applications, ISIC-97, Singapore, Singapore, 10-12 September 1997.

  41. D. Maksimovic, V. Oklobdzija, B. Nikolic, K.W. Current, "Design and Experimental Verification of a CMOS Adiabatic Logic with Single-Phase Power-Clock Supply," Proceedings of the 40th Midwest Symposium on Circuits and Systems, Sacramento, CA, August 3-6, 1997, pp. 417-420.

  42. B. Nikolic, D.V. Tosic, S. Marjanovic, "Symbolic Analysis of Feedback Amplifier Circuits", Proc. 4th International Workshop on Symbolic Methods and Applications to Circuit Design, Leuven, Belgium, October 10-11, 1996, pp. 244-247.

  43. B. Nikolic, D.V. Tosic, S. Marjanovic, "Symbolic Analysis of Feedback Amplifier Circuits," (in Serbo-Croat), Tehnika: Elektrotehnika, Vol. 45, No 7-8, pp. E1-E5, July/August 1996.

  44. B. Nikolic, B. Ristic, S. Marjanovic, "Data Transmission System Over Electric Power Distribution Circuits," (in Serbo-Croat), II TELFOR Symposium, Belgrade, Yugoslavia, 1994, pp. 258-261.

  45. B. Ristic, B. Nikolic, S. Kovacevic, S. Marjanovic, "Data Transmission Modem Over Electric Power Distribution Circuits," (in Serbo-Croat), XXXVIII ETRAN Conference, Vol. II pp. Niš, Yugoslavia, 1994, pp. 79-80.

  46. B. Nikolic, D. Vujadinovic, B. Ristic, S. Marjanovic, "Remote Power Meter Reading System," (in Serbo-Croat), XXXVIII ETRAN Conference, Vol. II, Niš, Yugoslavia, 1994, pp. 77-78.

  47. B. Nikolic, S. Kovacevic, B. Ristic, S. Marajanovic, "Power Distribution Circuits as a Communications Medium," (in Serbo-Croat), XXXVII ETAN Conference, Vol. II - E, pp. 51-56, Belgrade, Yugoslavia, 1993, pp. 51-56.
Revised: June 20, 2003.