Computer Science 252. Graduate Computer Architecture. (4 units)

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Catalog Description

Three hours of lecture and one hour of discussion per week. Prerequisites: CS 152. Graduate survey of contemporary computer organizations covering: early systems, CPU design, instruction sets, control, processors, busses, ALU, memory, pipelined computers, multiprocessors, and case studies. Term paper or project required.

Expanded Description

This course focuses on the techniques of quantitative analysis and evaluation of modern computing systems, such as the selection of appropriate benchmarks to reveal and compare the performance of alternative design choices in system design. The emphasis is on the major component subsystems of high performance computers: pipelining, instruction level parallelism, memory hierarchies, input/output, and network-oriented interconnections. A new focus will be the architectural design issues of highly portable, power-limited computing systems. Students will undertake a major computing system analysis and design project of their own choosing.

Course Grading

Homeworks (two person teams): 30%
Exams (two in-class midterms): 30%
Project (two person teams): 30%
Class Participation: 10%

Instructors, Fall 1995

Lecturer: Randy H. Katz, Professor Teaching Assistant: Giao Thanh Nguyen ("Yao")
Here is his picture.

Location

Lecture: MWF 1 - 2 PM, 310 Soda Hall
Discussion: T 2 - 3 PM, B1 Northgate; Th 3 - 4 PM, 343 LeConte

Textbook

J. L. Hennessy and D. A. Patterson, Computer Architecture: A Quantitative Approach, 2nd Edition (NEW!), Morgan Kaufmann Publishing Co., Menlo Park, CA.

Enrolled Student Snapshots

A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

Course Projects

An Evaluation of Correlation Based Branch Prediction on the Alpha Architecture, Alok Agrawal and Michael Chu
Power and Performance Tradeoffs in Microprocessor Cache Design, Jennie Chen and Bruce McGaughy
Optimizing the QR Eigensolver for the IBM Power2 Architecture, Tzu-yi Chen and Andrey Zege
Benchmarks for Graphics/Video Applications , Stephen Chenney and Alok Mittal
Latency Hiding in Uniprocessors using Multithreading , Brent Chun and Franklin Cho
Branching on Superscalar Machines: Speculative Execution of Multiple Branches, Richard Fromm and Bassam Tabbara
Accelerating the RISC Processor Using Programmable Logic, Sriram Rajamani and Pramod Viswanath
Reducing Power Consumption for the Next Generation of PDAs: It's the Network Interface!, Mark Stemm, Paul Gauthier, Daishi Harada
Harware/Software Architectures for TCP/IP Acceleration of UNIX Workstations, Roy Sutton and Sameer Jalnapurkar
A Comparative Analysis of Branch Prediction Schemes, Zhendong Su and Min Zhou
Slow Fourier Transforms on Fast Microprocessors, Taku Tokuyasu and Bernt Pfromm
Compressed Reduced Instruction Set COmputing (CRISCO), Patrick Warner and Geroncio Galicia
Instruction Level Power Analysis of the ARM60, Anna Reznik

Tentative Course Lecture Plan

Week 1 (28 August - 1 September)

Week 2 (6 September - 8 September)*

Week 3 (11 September - 15 September)

Week 4 (18 September - 22 September)

Week 5 (25 September - 29 September)

Week 6 (2 October - 6 October)

Week 7 (9 October - 13 October)

Week 8 (16 October - 20 October)

Week 9 (23 October - 27 October)

Week 10 (30 October - 3 November)

Week 11 (6 November - 10 November)

Week 12 (13 November - 17 November)

Week 13 (20 November - 22 November)*

Week 14 (27 November - 1 December)

Week 15 (4 December - 8 December)

Handouts

Handout 0: Background Questionaire
Handout 1: Homework Assignment #1, Due 8 September 95
Handout 2: Project Suggestions from Previous Semesters
Handout 3: Project Suggestions Fall 1995
Handout 4: Homework Assignment #2, Due 22 September
Handout 5: Project Survey #1, Due 15 September
Handout 6: Result of Project Survey, as of 18 September
Handout 7: Project Survey #2, Due 29 September
Handout 8: Result of Project Survey #2, as of 2 October
Handout 9: Homework Assignment #3, Due 13 October
Handout 10: Project Checkpoint #1, Due 13 October
Handout 11: Homework Assignment #4, Due 30 October
Handout 12: Project Checkpoint #2, Due 17 November
Handout 13: Final Project Report Specification

Other Useful Links

Tom Burd's CPU Central
Susan Egger's Course at the University of Washington
Hennessy & Patterson's Textbook Homepage

Randy H. Katz, ed., randy@cs.Berkeley.edu, Last Edited: 13 Dec 95