Partner 1 | Partner 2 | Area | Title |
Chen, T-Y | Zege, A | Benchmarking
| Performance Modelling of Parallel SVD Code |
Chenney, S | Mittal, A | Benchmarking
| Graphics Benchmark Design and Implementation |
Agrawal, A | Chu, M | Branch Prediction
| Evaluation of Dynamic Branch Prediction Schemes for Deeply Pipelined Superscalar Machines |
Stemm, M | Harada, D | Low Power
| A Quantative Analysis of Network Interface Power Management in Portable Computers |
Pfrommer, B | Tokuyasu, T | Benchmarking
| Performance measurements of a 3d FFT on a Power2 IBM 590 |
Cho, F | Chun, B | Benchmarking | Multiscalar Architectures |
McGaughy, B | Chen, J | Low Power
| Low Power Design for Microprocessor |
Zhou, M | Su, Z | Branch Prediction
| Comparison of Branch Prediction Schemes |
Sutton, R | Jalnapurkar, S | Network Interfaces
| Hardware/Software architectures for TCP/IP acceleration for UNIX Workstations |
Viswanath, P | Rajamani, S | Special Purpose HW
| Accelerating the RISC processor using Programmable Logic |
Fromm, R | Tabbara, B | ILP
| Limits to ILP in the ALPHA microprocessor |
Warner, P | Galicia, G | Embedded Systems
| CRISCO (Compressed Reduced Instruction Set COmputing) |
Reznik, D | Nayak, A | HW Support for PL
| Virtual Machine internal organization and its impact on performance |