CS252 Spring '10: List of papers handed out so far.

• The Case for the Reduced Instruction Set Computer, David Patterson and David Ditzel. ACM SIGARCH Computer Architecture News 8 (15 Oct 1980)
• Comments on 'The Case for the Reduced instruction Set Computer' by Patterson and Ditzel, Douglas Clark and William Strecker. ACM SIGARCH Computer Architcture News 8 (15 Oct 1980)
• Retrospective on High-Level Computer Architecture, David Ditzel and David Patterson. Proceedings of the International Symposium on Computer Architecture (ISCA) 1981.  See ISCA Retrospective

• A new approach to the functional design of a digital computer, R.S. Barton, AFIPS Conference Proceedings, Vol. 19, 1961, pp393-396.
• Design of the B5000 system, W. Lonergan, P. King, Datamation, Vol. 7 No. 5, May 1961, pp28-32. For further detail, see also B5000 Descriptor
• Architecture of the IBM System/360, G. M. Amdahl, G. A. Blaauw, F. P. Brooks Jr., IBM J. Res. Develop. Vol. 8, No. 2, 1964. An introduction to the 360 architecture is available from bitsavers.org: Mirrored HERE.

Reading 3:
Monday
1/31

• Implementation of Precise Interrupts in Pipelined Processors, James Smith and Andrew Pleszkun. Proceedings of the International Symposium on Computer Architecture (ISCA) 1985. See ISCA Retrospective
• Instruction Issue Logic for High-Performance, Interruptable Pipelined Processors, Gurindar Sohi and Sriram Vajapeyam. Proceedings of the International Symposium on Computer Architecture (ISCA) 1987. See ISCA Retrospective

Reading 4:
Wednesday
2/2

• The CRAY-1 Computer System, Richard Russel. Communications of the ACM, 21(1) 63-72, January 1978. A complete user-manual (quite interesting) is available from bitsavers.org: Mirrored HERE.
• Parallel Operation in the CDC 6600, James E. Thorton. AFIPS Proc. FJCC, pt. 2 vol. 03, pp. 33-40, 1964. A complete user-manual (quite interesting) is available from bitsavers.org: Mirrored HERE.

• A Preliminary Architecture for a Basic Data-Flow Processor, Jack Dennis and David Misunas. Proceedings of the International Symposium on Computer Architecture (ISCA) 1975. See ISCA Retrospective
• Monsoon: an Explicit Token-Store Architecture, Gregory papadopoulos and David Culler. Proceedings of the International Symposium on Computer Architecture (ISCA) 1990.   See ISCA Retrospective

• Alternative Implementations of Two-level Adaptive Branch Prediction, Tse-Yu Yeh and Yale Patt. Proceedings of the International Symposium on Computer Architecture (ISCA), 1992. See ISCA Retrospective
  Supplemental Reading:
  
  • The YAGS branch prediction scheme, A. N. Eden and T. Mudge. Proceedings of International Symposium on Microarchitecture (MICRO-31), 1998 
• A Comparative Analysis of Schemes for Correlated Branch Prediction, Cliff Young, Nicolas Gloy, and Michael D. Smith. Proceedings of the International Symposium on Computer Architecture (ISCA), 1995.

• Value locality and load value prediction, Mikko H. Lipasti, Christopher B. Wilkerson and John Paul Shen. Proceedings of the Seventh International Symposium on Architectural Support for Programming Languages and Operating Systems (ASPLOS-VII), 1996
• Memory Dependence Prediction using Store Sets, George Z. Chrysos and Joel S. Emer. Proceedings of the International Symposium on Computer Architecture (ISCA), 1998

• The Predictability of Data Values, Yiannakis Sazeides and James E. Smith. Proceedings of International Symposium on Microarchitecture (MICRO-30), 1997
  Supplemental Readings:
  • Selective Value Prediction, Brad Calder, Glenn Reinman, and Dean Tullsen. Proceedings of the International Symposium on Computer Architecture (ISCA-26), 1999
  The Alpha 21264 Microprocessor, R.E. Kessler. IEEE Micro, pp 24-36, Vol 19, No. 2 (March 1999)
  Supplemental Readings:
  • The Alpha 21264: a 500 MHz out-of-order execution microprocessor, D. Leibholz and R.  Razdan, Appears in Proceedings of CompCon '97
  • Circuit Implementation of a 600MHz Superscalar RISC Microprocessor, M. Matson, D. Bailey, S. Bell, L. Biro, S. Butler, J. Clouser, J. Farrell, M. Gowan, D. Priore, and K. Wilcox, Appears in Proceedings of International Conference on Computer Design (ICCD '98).
• Complexity-effective superscalar processors, Subbarao Palacharla, Norman P. Jouppi and J. E. Smith. Proceedings of the 24th International Symposium on Computer  Architecture (ISCA). Denver, 1997 
  Supplemental Reading:
  • Quantifying the Complexity of Superscalar Processors, Subbarao Palacharla, Norman P. Jouppi and J. E. Smith,Technical Report CS-TR-96-1328, University of Wisconsin, Madison, 19 November 1996.

• Sparcle: An Evolutionary Processor Design for Large-Scale Multiprocessors, Anant Agarwal, John Kubiatowicz, David Kranz, Beng-Hong Lim, Donald Yeung, Godfrey D'Souza, and Mike Parkin. IEEE Micro, pages 48-61, June 1993
• Simultaneous multithreading: maximizing on-chip parallelism,  Dean M. Tullsen, Susan J. Eggers and Henry M. Levy. Proceedings of the 22nd annual international symposium on Computer architecture, June 22 - 24, 1995.  See ISCA Retrospective

• Very Long Instruction Word Architectures and the ELI-512, Joseph Fisher. Proceedings of the International Symposium on Computer Architecture (ISCA), 1983. See ISCA Retrospective
  Supplemental Reading:
  • Trace Scheduling: A Technique for Global Microcode Compaction, Joseph Fisher. IEEE Transactions On Computers, Vol. C-30, No 7, July 1981
• The Transmeta Code Morphing Software: Using Speculation, Recovery, and Adaptive Retranslation to Address Real-Life Challenges, James C. Dehnert, Brian K. Grant, John P. Banning, Richard Johnson, Thomas Kistler, Alexander Klaiber, Jim Mattson. Appeared in the Proceedings of the First Annual IEEE/ACM International Symposium on Code Generation and Optimization, March 2003
  Supplemental Reading:
  • The Technology Behind Crusoe™ Processors, Alexander Klaiber, Whitepaper Transmeta Corporation, January 2000

• The Future of Wires, Ron Ho, Kenneth W. Mai, and Mark A. Horowitz. Appears in Proceedings of the IEEE, Vol 89, No. 4, April 2001
• Performance Analysis of k-ary n-cube Interconnection Networks, Bill Dally, Appears in IEEE Transactions on Computers, Vol. 39, No 6, July 1990

• Virtual-channel Flow Control, Bill Dally, Appears in IEEE Transactions on Parallel and Distributed Systems, Vol 3, No 2, March 1992
• An Adaptive and Fault Tolerant Wormhole Routing Strategy for k-ary n-cubes, Daniel H. Linder and Jim C. Harden, Appears in IEEE Transactions on Computers, Vol. 40, No. 1, January 1991

• Design Tradeoffs for Tiled CMP On-Chip Networks, James Balfour and William Dally. Appears in Proceedings of the International Conference on Supercomputing (ICS) 2006
• Active messages: a mechanism for integrated communication and computation  Thorsten von Eicken, David E. Culler, Seth Copen Goldstein,     Klaus Erik Schauser. Appears in the Proceedings of the 19th annual international symposium on Computer architecture, 1992
• The Message-Driven Processor: A Multicomputer Processing Node with Efficient Mechanisms, William Dally, J.A. Stuart Fiske, John Keen, Richard Lethin, Michael Noakes, Peter Nuth, Roy Davison, and Gregory Fyler, Appears in IEEE Micro, April 1992

• The Anatomy of a Message in the Alewife Multiprocessor. John Kubiatowicz and Anant Agarwal. Proceedings of the International Conference on Supercomputing (ICS) 1993, pages 195-206, July 1993.
• Exploiting Two-Case Delivery for Fast Protected Messaging.  Kenneth Mackenzie, John Kubiatowicz, Anant Agarwal, and Frans Kaashoek. Proceedings of 4th Int'l Symposium on High Performance Computer Architecture Feb. 1998

• Weak Ordering - A New Definition, S.V. Adve and M.D. Hill, Proceedings of the 17th Annual International Symposium on Computer Architecture, May 1990. See ISCA Retrospective
• Memory Consistency and Event Ordering in Scalable Shared-Memory  Multiprocessors, Kourosh Gharachorloo, Daniel Lenoski, James Laudon, Phillip Gibbons, Anoop Gupta, and  John Hennessy,  Proceedings of the International symposium on Computer Architecture, 1990. See ISCA Retrospective

• The directory-based cache coherence protocol for the DASH multiprocessor, Daniel Lenoski, James Laudon, Kourosh Gharachorloo, Anoop Gupta, and John Hennessy. Proceedings of the International symposium on Computer Architecture, 1990.
  Supplemental:
  • The DASH Prototype: Implementation and Performance, Daniel Lenoski, James Laudon, Truman Joe, David Nakahira, Luis Stevens, Anoop Gupta, and John Hennessy. Proceedings of the International symposium on Computer Architecture, 1992. SeeISCA Retrospective
• LimitLess Directories: A Scalable Cache Coherence Scheme, David Chaiken, John Kubiatowicz, and Anant Agarwal, Proceedings of the Fourth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS IV), pages 224-234, April 1991.
  Supplemental:
  
  • The MIT Alewife Machine: Architecture and Performance, Anant Agarwal, Ricardo Bianchini, David Chaiken, Kirk L. Johnson, David Kranz, John Kubiatowicz, Beng-Hong Lim, Kenneth Mackenzie, and Donald yeung. Proceedings of the International symposium on Computer Architecture, 1995.  SeeISCA Retrospective

Reading 18:
Wednesday
4/7

• Timestamp snooping: an approach for extending SMPs,   Milo M. K. Martin, David A. Wood, Daniel J. Sorin, Anatassia Ailamaki, Alaa R. Alameldeen, Ross M. Dickson, Carl J. Mauer, Kevin E. Moore, Manoj Plakal, and Mark D. Hill, In Proceedings of the Ninth international conference on Architectural support for programming languages and operating systems, 2000
• Is SC + ILP = RC?  Chris Gniady, Babak Falsafi, T. N. Vijaykumar, In Proceedings of the 26th annual international symposium on Computer architecture, 1999

Reading 19:
Monday
4/12

• Efficient synchronization: let them eat QOLB, Alain Kägi, Doug Burger, James R. Goodman, Proceedings of the 24th annual international symposium on Computer architecture, 1997
  Supplemental:
  
  • Synchronization without Contention, John M. Mellor-Crummey and Michael L. Scott.  In Proceedings of The 4th International Conference on Architectural Support for Programming Languages and Operating Systems, pages (ASPLOS), 1991
    
  • Reactive synchronization algorithms for multiprocessors, Beng-Hong Lim and Anant Agarwal. In proceedings of the sixth international conference on Architectural support for programming languages and operating systems (ASPLOS), 1994
• LogTM: Log-based Transactional Memory.  Kevin E. Moore, Jayaram Bobba, Michelle J. Moravan, Mark D. Hill & David A. Wood.  Appears in the proceedings of the 12th Annual International Symposium on High Performance Computer Architecture (HPCA-12), 2006
  • Transactional memory: architectural support for lock-free data structures, Maurice Herlihy. J. Eliot B. Moss, Proceedings of the 20th annual international symposium on Computer architecture, 1993

• A Case for Redundant Arrays of Inexpensive Disks (RAID), David patterson, Garth Gibson, and Randy Katz, ACM SIGMOD conference, 1988
• EVENODD: an optimal scheme for tolerating double disk failures in RAID architectures, M. Blaum, J. Brady, J. Bruck and J. Menon. Proceedings of the 21st International Symposium on Computer Architecture (ISCA), 1994

Reading 21:
Monday
4/19

• A Class of Optimal Minimum Odd-weight-column SEC-DED Codes, M. Y. Hsiao. IBM J. Res Develop, vol 14, no 4, July 1970
  Supplemental:
  
  • A Class of Odd-Weight-Column SEC-DED-SbED Codes for Memory System Applications, Shigeo Kaneda. IEEE Transactions on computers, vol c-33, no 8, August 1984
• Erasure Coding vs. Replication: A Quantitative Comparison, Hakim Weatherspoon and John Kubiatowicz. Appears in Proceedings of the First International Workshop on Peer-to-Peer Systems (IPTPS 2002), March 2002
• A Digital Fountain Approach to Reliable Distribution of Bulk Data, John W. Byers, Michael Luby, Michael Mitzenmacher, Ashutosh Rege, ACM SIGCOMM, 1998

• DIVA: a reliable substrate for deep submicron microarchitecture design,  Todd M. Austin. Proceedings of the 32nd Annual ACM/IEEE international symposium on microarchitecture on (MICRO-32), 1999
• Transient fault detection via simultaneous multithreading, Steven K. Reinhardt and Shubhendu S. Mukherjeem. Proceedings of the 27th Annual International Symposium on Computer Architecture (ISCA), 2000