Summary
Summary
m Simulation will remain important as a component of implementation verification.
Ô Symbolic simulation making effective use of "don't-care" information will be the "CVS" for logic.Ô The BDD-style of canonical representation will find increasing use for combinational verification and perhaps will be extended to the sequential case.
m Verification User Environments will become increasingly important.
Ô A special case of the CAD Framework.Ô "Low-tech" interfaces and user-oriented ("design centered") tools essential.Ô Offers protection against the "simulator of the year" problem.