ASIC (Performance)

• Assumptions:

  • 0.25 um technology provided by ST
  • 25 MHz clock rate
  • 1.0 V supply voltage
  • Custom multipliers and triple-ported register files
  • Standard cells for the rest (using a library provided by ST)

• Blocks:

  • Mpy: 960ns
  • 1-D DCT: 9600ns

• Total: 0.046s

Previous slide

Next slide

Back to first slide

View graphic version