Chapter 3 Overview

• Multi-Level Logic

Conversion to NAND-NAND and NOR-NOR Networks

DeMorgan's Law and Pushing Bubbles

AND-OR-Invert Building Blocks

CAD Tools for Multi-Level Optimization

• Time Response in Combinational Networks

Gate Delays and Timing Waveforms

Hazards/Glitches and How To Avoid Them

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