Sequential Consistency
Bus imposes total order on bus xactions for all locations
Between xactions, procs perform reads/writes (locally) in program order
So any execution defines a natural partial order
- Mj subsequent to Mi if
- (I) follows in program order on same processor,
- (ii) Mj generates bus xaction that follows the memory operation for Mi
In segment between two bus transactions, any interleaving of local program orders leads to consistent total order
w/i segment writes observed by proc P serialized as:
- Writes from other processors by the previous bus xaction P issued
- Writes from P by program order