Week
|
Day
|
Topic
|
HW
|
Lab
|
1
|
20 Jan
|
Course
Administration.
Logic Review: The Many Representations of Hardware.
Readings: K&B, Ch. 1; pp. 1-27.
|
|
Lec #1:
Instrumentation
|
22 Jan
|
Transistor and
Gate Logic.
Readings: K&B, Sec. 2.1, 2.3, 2.4; pp. 34-37, 46-66.
|
2
|
27 Jan
|
Combinational
Logic.
Readings: K&B, Sec. 2.6, 3.5; pp. 77-81, 131-134.
|
|
Lab #1:
Instrumentation
Lec #2: Cad
Tool Flow
|
29 Jan
|
Programmable
Logic: PAL/PLA and FPGA.
Readings: K&B, Sec. 4.1, 4.2, 4.3; pp. 157-209.
|
3
|
3 Feb
|
Verilog
Hardware Description Language.
Readings: K&B, Sec. 3.6; pp. 143-148.
|
|
Lab #2: Cad
Tool Flow
Lec #3:
Verilog Simulation
|
5 Feb
|
Basic Finite
State Machines: Flip-Flops, Registers, Shifters, Counters.
Readings: K&B, Sec. 6.1, 6.2.1-6.2.3, 6.3, 7.1; pp. 261-300,
310-324.
|
4
|
10 Feb
|
Moore and
Mealy Machines.
Readings: K&B, Sec. 7.2, 7.3; pp. 324-342.
|
|
Lab #3:
Verilog Simulation
Lec #4:
Verilog Synthesis
|
12 Feb
|
FSM Synthesis,
State Machine Timing.
Readings: K&B, Sec. 6.2, 7.4, 9.1, 9.2; pp. 280-285, 342-350,
409-417.
|
5
|
17 Feb
|
Midterm I
Review
|
|
Lab #4:
Verilog Synthesis
Lec #5:
Debugging
|
19 Feb
|
Midterm I
|
6
|
24 Feb
|
Case Study:
SDRAM/Memory Controller.
Readings: K&B, Sec. 10.4, 10.6; pp. 474-490, 495-508.
|
|
Lab #5:
Debugging
Lec #6: Ckpt #1:
Memory
Controller, I
|
26 Feb
|
Project
Description: Multimedia Network Router.
Readings: Project specification documents.
|
7
|
2 Mar
|
Datapath
Building Blocks: Arithmetic Units, Register Files, Shifters, FIFOs,
Memories.
Readings: K&B, Sec.5.5-5.7, 6.3, 6.4; pp. 235-256, 289-299.
|
|
Lab: Ckpt #1: Memory
Controller (2 weeks)
Lec #7: Memory
Controller, II
|
4 Mar
|
Datapath
Interconnection: Point-to-Point, Single Bus, Mixed Strategy
Readings: K&B, Ch. 11.
|
8
|
9 Mar
|
Datapath
Control: State Machines for Control; Register Transfer Abstraction.
Readings: K&B, Ch. 12.
|
|
Lab: Ckpt #1
Memory
Controller (Due)
Lec #8: Ckpt
#2
|
11 Mar
|
Datapath
Control: Microprogramming.
Readings: K&B, Ch. 12.
|
9
|
16 Mar
|
Control
Timing, Pipelining, Re-timing.
Readings: K&B, Ch. 12;
|
|
Lab: Ckpt #2 (2 weeks)
Lec #9: Tips and Techniques
|
18 Mar
|
Midterm II
Review
|
Spring Break
|
22-26 Mar
|
|
|
|
10
|
30 Mar
|
Midterm II
|
|
Lab: Ckpt #2 (Due)
Lec #10: Ckpt
#3
|
1 Apr
|
State Machine
Optimization, State Encodings, and State Assignment.
Readings: K&B, Sec. 7.4, 8.1, 8.2; pp. 342-350, 375-387.
|
11
|
6 Apr
|
State Machine
Partitioning and Synchronous Inter-FSM Communications.
Readings: K&B, Sec. 8.3, 8.4; pp. 387-399.
|
|
Lab: Ckpt #3 (1 week)
Lec #11: Ckpt #4
|
8 Apr
|
Design for
Test: Observation.
|
12
|
13 Apr
|
Design for
Test: Self-Checking.
|
|
Lab: Ckpt #4 (1 week)
Lec #12: Final Integration
|
15 Apr
|
Metastability,
Arbiter Design, Hazards.
Readings: K&B, Sec. 6.2.4, 6.2.5, 3.5.4-3.5.8; pp. 284-289,
134-141.
|
13
|
20 Apr
|
Asynchronous
Communications.
|
|
Lab: Final Integration
(2 weeks)
|
22 Apr
|
Arithmetic
Circuits: Building Blocks.
Readings: K&B, Sec. 5.6, 5.7; pp. 239-252.
|
14
|
27 Apr
|
Arithmetic
Circuits: Combinational and Sequential Multiplier.
Readings: K&B, Sec. 5.8, 10.5; pp. 252-256, 490-495.
|
|
Lab: Final
Integration
and Project Demonstration
Lec #13: Final
Report Format
|
29 Apr
|
Evolution of
FPGA Architectures.
Readings: K&B, Sec. 9.4, 9.5; pp. 428-454.
|
15
|
4 May
|
CPU
Implementation I.
Readings: K&B, Ch. 12;
|
|
Lab: Final
Report
|
6 May
|
CPU
Implementation II.
Readings: K&B, Ch. 12;
|
15.5
|
11 May
|
Course Review
|
|
|
|
14 May
|
Final Exam,
12:30-3:30
|
|
|