EE 140 / 240A Analog Integrated Circuits

Spring 2017

MWF 3-4pm, 540 Cory

Class info, homework questions, etc.: piazza (signup)

previous semesters: 16sp, 15sp, 09fa

lectures; homework

My policy on CHEATING.  READ IT!

  Instructor 
 

Office Hours

Kristofer S.J. Pister 
pister@eecs <-- easiest method of contact 
512 Cory Hall – if my door is open, feel free to come in
W 11-12, F 4-5, or by email appointment

TAs, OH

Brad Wheeler, brad.wheeler@berkeley.edu, Th 11-12, 125 Cory; F 10-11, 258 Cory

Required Texts

Razavi, Design of Analog CMOS Integrated Circuits , 2nd ed.

Suggested reference 

Gray, Hurst, Lewis, Meyer, Analysis and Design of Analog Integrated Circuits, 5th edition.

Johns and Martin, Analog Integrated Circuit Design

Grading

Homework & labs

25%

Midterms (2)

10+15%

Project

25%

Final 

25%

 

 

Homework

Collaboration is encouraged; copying is not.  Explaining how you solved a problem to someone is fine; handing them your solutions is not.  Helping someone debug their schematic or circuit is fine; giving them your schematic is not.

Write your own answers and draw your own schematics without staring at someone else's. (see cheating policy above)

Project


Schedule

Week

Lectures

by Date

Topic

HW & labs

Reading (Razavi)

1

1/18

1/20

Introduction: what is 140 all about; Op-amps circuits in Lab 1

hw1 soln+rubric 1

 

Lab1   lab files

Ch 1

Review Ch 2.{1-3}

2

1/23

1/25

1/27

Taylor, Heaviside, and Bode

diode, BJT, & MOS physics

MOS small signal model(s) , body effect

hw2 soln+rubric 2

 

RoI chart pdf pptx

2.4

2.{5,6} skim

3

1/30

2/1

2/3

Common source

single pole amplifiers

frequency and step response

hw3 soln+rubric

3.3.{1-4} esp. figures 3.{5,6,18-20}

6.2 through eqn 6.22

4

2/6

2/8

2/10

CS; input pole

Input capacitance

Active load

hw4 soln+rubric

Lab 3part1

5

2/13

2/15

2/17

Common gate; Review
Midterm I – 1 page notes, 2 sides

sp08 mid1 solutions

fa09 mid1 solutions

sp15 mid1

sp16 exams

self-grade template

Frequency response notes

6

2/20

2/22

2/24

Presidents’ Day – no classes

Current mirrors; Differential pair
Differential amplifier

hw5

5.1 esp. Figures 5.{5,7,10,11}

4.{1,2} through Figure 4.14

7

2/27

3/1

3/3

2 stage op-amp frequency response

feedback, stability

compensation

hw6

Lab 3part2

6.2

Miller compensation figures

10.{1-6}

8

3/6

3/8

3/10

2 stage op-amp

common mode and differential gain

RHP zero from Cc

hw7

5.3 esp. Figures 5.{23, 29,30}

9

3/13

3/15

3/17

RHP zero; Current mirror pole/zero doublet;

Supply-independent biasing

hw8

Lab 4

10

3/20

3/22

3/24

Supply-independent biasing

midterm review

Midterm II – Extended class period????

sp08 mid2

sp15 mid2

sp16

 

3/27-31

SPRING BREAK! 

SNOW

SNOW

11

4/3

4/5

4/7

Telescopic & Folded cascode

Folded cascode; biasing

Switched capacitors; ADCs and DACS; Regulators

hw9

Lab 5

9.2

5.2

Wikipedia: ADC, SAR ADC

12

4/10

4/12

4/14

Switched capacitors: ADC, PGA

MOS switch

project

13.2

StrongArm

13

4/17

4/19

4/21

Switched capacitors

Presenting results; const-gm biasing

14

4/24

4/26

4/28

rail-to-rail input and output

Ri, Ro, and feedback

noise

15

5/1

5/3

5/5

RRR week.  Project presentations.

15spFinal

09faFinal