| Area | Project | People |
| Area A |
Study of Quad Pentium Pro Behavior Under OLTP Workload and MS SQL Server DBMS |
Jonathan Kung, Megan Thomas |
Optimizing a Multigrid Solver on Sequential Machines and SMPs |
Rich Vuduc, Michael Wittman |
Architectural Analysis of SMP Systems for the NAS Parallel Benchmark |
Frederick Wong, David Wu |
VIA |
Phil Buonadonna, Andy Geweke |
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| Area B |
Network vs. Local Bus |
Ravi Gunturi, Mark Spiller |
| Very Large Scale Backup |
Adam Costello, Chris Umans, Felix Wu |
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| Area C |
Cache Optimizations |
Carleton Miyamoto |
| Influence of Caches on the Performance of Algorithms |
Andris Ambainis, Alex Berg, Benjamin Diament |
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| Area D |
Benchmarking PDAs |
Michael Downes, Adam Janin |
| P6: Project to Profile Pilot PDA Power and Performance |
Jason I. Hong, Mark Newman |
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| Area E |
BDTI on ARM, MMX |
Hungchi Lee, Jian-jin Tuan |
| Speech on a Vector Architecture |
Dan Gildea |
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| Area F |
Proposal for Pipelined, Low Power Tri-Multiplier implemented for VIRAM |
Cheol-Woong Lee, Norman Walker |
| TLB Design for VIRAM |
Omid Rowhani, Xiaoru Zhang |
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| Area G |
INESL: NESL on IRAM |
Aaron Brown, David Oppenheimer |
| Porting BDTI Benchmarks to a Vector Processor |
Haiyun Tang, Ning Zhang |
| CELP Speech Coding on VIRAM |
Heyning Cheng, Eugene Teh |
| Estimating the Multimedia Capabilities of IRAM through MPEG Encoding/Decoding |
Nathan Slingerland, Kirby Zhang |