Evolution of Optical Lithography

There is presently little disagreement on whether optical lithography can carry the I. C. industry to the 150-130nm generation in feature size. However there are to date few predictions of straightforward evolution of optics to address the 100nm generation. There are very limited options for reaching 100nm with optics. Fig. 1 replots the data from Fig. 1.1 of a 1991 SRC-sponsored white paper on the future of Lithography (the principle changes from the earlier data projections reflect the unexpected long-life of I-line optics, and the slow movement to deep ultraviolet (DUV). [Oldham 1991] The path to 130nm appears to be a combination of increase in numerical aperture, modest improvements in effective K1 values, and the development of 193nm sources, optics and resists. Sophisticated stage technology for rapid, accurate scanning of images is also necessary, in order to relax field size requirements and permit the needed growth in numerical aperture.

Several technical risks remain in the path projected in Fig 1, perhaps the chief of which relates to the life of optical elements under DUV radiation. The high intensities required in high-throughput scanning systems exacerbate the optical damage problem [Schenker 1997]. The development of CaF₂ optics for construction of elements experiencing high-intensity radiation would be a significant enabler for 193 scanning optics. This material could also be important in achieving the chromatic corrections needed for all-refractive optics, in case the very stringent line narrowing and stability needed from the ArF laser for monochromatic operation cannot be obtained.

Can Optical Lithography Reach 100nm?

Given the amazing record of optical lithography in going beyond a number of previous "fundamental limits", one would be foolish indeed to predict the demise of optical lithography. In fact there are a number of ways known even now to get to 100nm, and possibly slightly beyond. For example:

1. A breakthrough in all reflective optical design together with the development of a robust F₂ laser (157nm) would enable evolution to 157nm, and bring the minimum feature size down to 100nm for a scanned system. Or
2. If a liquid immersion optic with NA in the range of 1.1 were designed and accepted, 100nm would be reachable at a wavelength of 193nm. (However the very high speed scanning required with small-field optics would appear to be incompatible with liquid between the optic and the wafer.)

Without further discussion of optics, I feel comfortable in predicting the availability of optics with specified resolution of 120nm by the year 2005. Predictions beyond this feature size and time frame are more difficult.

Technology Options Beyond the Conventional Optical Limit

There are a number of technologies at various stages of development being researched for potential replacement of optical lithography. In increasing order of technological risk they are

1. E-beam lithography
2. X-ray lithography
3. EUV lithography
4. Ion-beam lithography
5. Various approaches to maskless lithography

The order of this list, perhaps somewhat subject to debate, would change if certain non-technical factors such as cost of ownership, mask availability, throughput, and so forth were included. For example conventional e-beam lithography, a tried and true technology capable of writing very small features, has a fundamental problem in achieving high throughput. There are today very few advocates for e-beam as a general purpose patterning technology. Even the developers of cell and character projection systems see severe throughput difficulties in the 100nm feature size regime. (Newer forms of e-beam lithography such as SCALPLE can potentially address the throughput issue, but introduce significant additional technical risk.)

If we use the level of industrial support as a measure, two technologies are clearly favored at this time, namely X-ray lithography and EUV lithography. Both are under intensive development, especially in the U. S. Smaller, but significant efforts are underway in Japan and Europe. The SCALPLE project at Bell laboratories, and the cell projection program at Hitachi are the major efforts in e-beam lithography. The ion-lithography effort led by the group in Vienna and partially funded through ALG appears to be stalled, at least for the moment. There are a number of other approaches to general-purpose lithography which are only in the research stage. In particular there are several approaches to maskless lithography, depending to various degrees on parallel arrays of writing instruments. The most modest approach, arrays of up to about one hundred mini electron columns, has moved from IBM Research to ETEC. Research at Cornell and Stanford is aimed at exploring much larger arrays, involving possibly thousands of parallel beamlets. The rapidly developing MEMs technology, using both single crystal Si and polycrystalline films to construct arrays of microstructures makes possible a variety of other writing approaches. One example is the Stanford work on lithography with arrays of AFM tips. Another is the MIT proposal to make arrays of shutters for soft X-rays, and focus the beams with zone plates. Yet others would use arrays of moveable micromirrors to modulate optical beams at suitable wavelengths (such as in the EUV region). Clearly the various technologies are at quite different stages of development, something to keep in mind in the brief discussion which follows.

X-Ray Technology

X-ray lithography has demonstrated compatibility with production-worthy Si fabrication facilities, an ability to yield modern high-density circuits, and resolution of 100nm and below in useful devices and circuits. The infrastructure necessary for widespread industrial use is beginning to form, but is not yet fully here. The most significant programs are in Japan. In this country, Motorola and IBM are the only SIA members with active x-ray programs. XRL has matured to a stage where with further engineering, particularly on the mask, insertion in ULSI manufacturing before the end of the century is feasible.

What has been done with x-ray lithography:

For several years XRL has been used to produce high performance devices and high density circuits, some at 100nm and below. Most of the sub-100nm work has been done in universities [1,2]. Researchers at NTT in Japan have used XRL to fabricate complex chips, including fully functional LSI CMOS circuits at 200nm on SIMOX with 20nm (3s) CD control [3]. At the1996 IEDM NTT reported a 240nm-pitch 4-G DRAM array using XRL [4]. IBM has fabricated fully-functional 512K SRAMs with 6 million transistors, and 64Mbit DRAM chips with bit yields of better than 99.9%, establishing the suitability of XRL in a production worthy Si fabrication facility [5]. More recently, logic test chips with 80nm minimum features were fabricated. CMOS ring oscillators on SOI with 100nm gates were fabricated with XRL and had a room temperature delay per stage of 15psec at 1.5V.

Motorola processed several 1Mbit SRAM lots with 0.35mm ground rules, exposing up to three critical levels with XRL. Some of the lots had fully functioning SRAMs with yields comparable to I-line lithography, demonstrating that x-ray masks can be fabricated and used for complex circuits. Each x-ray exposure field contained four 1Mbit SRAM circuits with more than 5 million transistors per circuit. At the 1995 IEDM meeting, Mitsubishi reported on the fabrication of memory cell arrays for 1Gbit DRAMs at 0.14mm minimum feature size using XRL [6]. Figure 1 illustrates the layout of the Mitsubishi DRAM cells and the cross-sectional configuration. An exposure latitude of 22% and 3s CD control of 14nm were achieved.

It is widely acknowledged that XRL has important advantages and is basically a simple process that, once implemented, should significantly reduce the complexity (and possibly also the cost) of current IC fabrication processes. The remaining engineering problems are all relatively well understood. The major uncertainties are related to the mask, its freedom from distortion, its patterning, and the creation of an infrastructure that can supply masks to the semiconductor industry at the right price and the right turn-around time.

One of the unique advantages of XRL is "absorption without spurious scattering". Since the index of refraction of all material is very close to unity at x-ray wavelengths, there is essentially no reflection at interfaces, and hence no standing waves, no notching, and no need for antireflection coatings, tight control of resist thickness, or surface-imaging resist. The well-known wide-process-latitude of XRL is in large measure a consequence of absorption without spurious scattering.

The x-ray source and beam line - For high-throughput semiconductor lithography, the optimal source is a synchrotron. Synchrotrons designed for XRL are available from two commercial suppliers: Oxford Instruments and Sumitomo Heavy Industries. Both recently unveiled second-generation machines. The commercial synchrotrons are highly reliable, operating with better than 95% uptime, with no major problems or extended downtimes. A single synchrotron can accommodate 10 to 20 mask aligners, connected to the synchrotron via "beam lines". New beam-line designs can deliver 50-70 mW/cm2 over an area 50 x 50 mm, corresponding to an exposure time of about 1 sec.

The aligner and the overlay budget- Aligners for x-ray lithography are available commercially from SVGL, Suss Advanced Lithography (SAL), and Canon. The requirements on aligner stage performance are substantially the same for XRL as for example, for alignment of the aerial image to the wafer in optical lithography. The mask and substrate are immersed in a helium atmosphere which enables efficient temperature control. Table 1 illustrates the tolerances that must be achieved by the various components of an XRL system and process.

The mask - The mask is the cornerstone and the most daunting challenge of x-ray lithography. Recently, a consensus has emerged in the USA with regard to masks for Si ULSI manufacturing. Discussions among Japanese and US developers may soon result in an agreement on an international x-ray-mask standard.

The absorber pattern geometry is defined by electron-beam lithography. As with all types of masks, the e-beam writing time becomes very long, and data handling more complex, as we approach the 1-Gbit generation and beyond. The importance of reducing the e-beam contribution to linewidth and overlay error is evident from Table 1. The Leica EBPG has demonstrated 25 nm 3-s placement accuracy over a 2.5x2.5 cm field, making it the only commercial tool compatible with 150nm features. The tool's major limitation at this point is throughput. The work on spatial-phase-locked e-beam lithography offers the potential for significant improvements in e-beam placement accuracy, down to the nanometer level [7].

Equipment to effectively address the persistent problem of defects in XRL masks is available. Inspection of x-ray masks is done with the electron-beam SEMSPEC, manufactured by KLA. This tool is adequate down to 100nm features. Repair of x-ray masks is done with focused-ion-beam tools, of which there are three manufacturers: Micrion, FEI, and Seiko. X-ray masks can be purchased in research quantities from IBM Burlington and NATC (a commercial spin-off from NTT). Clearly, these vendors and perhaps others will have to scale up for volume production before manufacturing would be feasible.

Table 1 XRL Error Budget Analysis - Allocation of the maximum allowable contributions to overlay and linewidth error among the various components of an XRL

system. The individual contributions are added in quadrature. All dimensional values are in nanometers. Note the large contribution of e-beam writing.

Bits/ DRAM	256-Mb		1-Gb		4-Gb
Generation	1st	Shrink	1st	Shrink	1st	Shrink
CD(nm)	250	200	180	150	125	100
Overlay contributions (level-to-level)
Illumination	7	7	6	5	4	4
Aligner	55	40	40	33	27	22
E-beam writing	40	35	32	25	22	17
Mask residual	25	20	12	10	8	8
Wafer/resist	20	17	12	12	10	10
OVERLAY TOTAL (nm)	75	60	54	45	38	30
Linewidth contributions
Illumination	5	4	4	4	4	3
Aligner	2	2	3	3	3	4
e-beam writing	20	16	14	12	10	8
Mask residual	5	5	5	4	3	3
CD TOTAL(nm)	25	20	18	15	13	10

Extendibility - XRL can support several generations of linewidth, with modest evolution. The same synchrotron, beamline, stepper, mask structure (and possibly even resist) can be used at 0.13, 0.10 and 0.07 mm CD and beyond. Each generation will most likely see the introduction of steppers and masks that provide better overlay, but all generations can be based on the same basic approach and techniques. Synchrotrons and beamlines certainly do not need to be changed to support future generations of ULSI. Any advanced lithography technology requires an extensive industrial infrastructure to support its development and maturation. Important elements include: e-beam mask writers; mask inspection and repair tools; precision stages and aligners; mask materials, structures and standards; resists, etc. These are not yet all in place and will not be there until demanded by the industry. Extendibility below 100nm requires that the mask-sample gap can be reduced below 15mm. This is illustrated in Fig. 2. In order to manufacture in the sub-100nm domain using XRL, one must make incremental improvements over the technology applicable above 100nm. In particular, one must develop mask structures, gapping methods, patterning technologies, and alignment schemes compatible with sub-100nm devices.

EUV Technology

3 figures plus text addressing optics, resolution, and progress to be supplied

E-beam Technology

3-5 figures plus text addressing resist/coulomb-effect limits on throughput, voltage/proximity effect tradeoffs in mini/microcolumns, maskless approaches

to be supplied

Other Maskless Lithography Technologies

There are several attractive features unique to maskless lithography. The cost of fabricating, inspecting, maintaining, and cataloging masks, and the potential for yield loss associated with any errors in the mask management process are significant driving forces toward elimination of the mask. Comparing conventional pelliclized optical lithography with X-ray and EUV technology suggests higher defect control discipline would be required for the latter, aggravating an already difficult problem in the deep submicron regime. On the other hand, defects must still be controlled in maskless lithography, one eliminates principally the "repeating killer" defect, not all defects. A second feature of maskless lithography is the potential availability of a continuum of layout variations. This could be exploited in process development, device and circuit development, yield studies, customization of "low runner" designs, and in general in any development situation where exploration of a continuum of process parameters could be useful. Any maskless technology is also a candidate for a higher performance pattern generation technology for fabrication of masks or reticles for technologies requiring them.

MEMS technology makes possible a number of maskless approaches to lithography beyond simple arrays of e-beam columns. The most impressive results to date come out of Prof. Cal Quate's group at Stanford, in which "AMF" type proximal probes are rapidly scanned over the surface to be patterned. Figure 10 illustrates the throughput which can be achieved with highly parallel arrays, and Figure 11 shows devices constructed with arrays of 4 tips, moving at speeds up to 3mm/sec. Interestingly, the writing speed to date is not limited by energy transfer, but simply by mechanical control and stability, leaving room for significant speedup. Problems under investigation include tip wear, automatic control of tip altitude, and sensitive resists for high-resolution patterning.

Prof. Hank Smith's group has proposed an array of shuttered zone plates, shown in Figure 12, which focus and modulate X-ray beams, with wavelength chosen for optimization of resolution and resist compatibility. Research is only beginning on this novel scheme, and will investigate both the MEMs aspects and the "optical" issues such as illumination.

Discussion

Present industrial strategy appears to favor choosing a 100nm "winner" in the near future, and concentrating the majority of development money on this technology. Given the assumption that 100nm technology is needed for development early in the next decade and for prototype manufacturing around 2005 or 2006, tool development must begin rather soon. Forcing the technology decisions onto such a schedule does not permit a normal research phase for the high-technical-risk technologies, despite their attractive features. Thus the tool development scenario most likely to take place is the full-scale development of either an X-ray or EUV tool, with a relatively low-level research effort in parallel to explore future alternatives. If , for example, one of the maskless approaches appears to be technologically feasible for large-scale manufacturing, it can be introduced at a later date.