Single-Chip Silicon Implementation Styles
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Notes:
In terms of approaching the organization of transistors and interconnect to implement functions in COTS silicon, we are using the concept of the implementation fabrics, or implementation style.
Implementation fabrics are particular ways of organizing and programming transistors and interconnect on silicon. They vary from fully software programmable (e.g. a general-purpose processor, memory), to electrically-programmable (e.g. FPGA), to mask programmable (e.g. standard cell or gate array).
We show a number of architectural styles on the left, and the associated emphasis in terms of implementation fabrics in use today. Over the years, each fabric has been optimized to address a particular need in terms of performance, power, agility (reprogrammability), cost, design time, and architectural or application need. These fabrics are tuned to a set of process technology assumptions as well. For example, standard cell organization was developed at a time when two levels of interconnect were available and when interconnect did not play a dominant role in circuit performance or power dissipation and so wiring channels were needed to wire up logic gates.
It is clear that the circuit fabrics in widespread use today are not optimal for the DSM silicon designs or 2010.