Slide 34 of 46
Given the needs expressed earlier, a model for MIL-SOC that would address many of these issues is illustrated above. By defining four levels of abstraction: hardware interface, fine-grain API (bit-level concurrency), coarse-grained API (thread-level concurrency), and an application interface, we believe the various forms of commercial and military IP could be accommodated for the foreseeable future.
Coarse-grained software programmable components (e.g. commercial processors) would integrate at the higher levels but could be mixed with finer grained components an interfaces, as illustrated above.