Physical Design of VLSI Circuits
Physical Design of VLSI Circuits
m Mature Area for Low-Medium Performance ICs
Ô Specific developments remain for specific technologies (e.g. Sea-of-Gates) Ô Significant empirical development work remains
m Procedural design still not successful, in general
m Timing-driven, multi-layer routing remains the major, outstanding problem.
m Next generation: General constraint-driven physical design.
Ô e.g. placement/path matching constraints for analog; path delay constraints for digital.