Simplified Model of Design

Simplified Model of Design

Behavior

Functions the system must implement

Time, area, power, etc. constraints

Implementation-independent description

Register

Components and their interconnections

Std. components & ROM, ASIC, PLD

Timing constraints for components

Gate

Low-level components & nets

In terms of ASIC library

EDIF well-suited to this description

Mask

Physical layout of IC or board

EDIF well-suited to this description

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