The Revolution in Electronic Design Automation: Implications for Automated Software Engineering

11/13/97


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Table of Contents

The Revolution in Electronic Design Automation: Implications for Automated Software Engineering

Semiconductor Industry Growth

Semiconductor Capital Investment

SIA/SRC 1994 National Technology Roadmap

Silicon Landscape in 2010

Electronic System Design Technology

Simplified Model of Design

PPT Slide

PPT Slide

PPT Slide

SOC in 1996

Chip Interconnect Systems

Other Near-Term Micro-Architectures

PPT Slide

“Simulator-of-The-Year” Phenomenon

“Simulator-of-The-Year” Phenomenon

Why Can't we Make Simulators Faster?

Why not Synthesis-Directed Simulation?

Major Design Verification Tasks

Observations From Design Technology

Role of Don't-Cares in Logic Synthesis

Role of Don't-Cares in Logic Synthesis

Role of Don't-Cares in Logic Synthesis

Fault Excitation and Observation

Optimality & Redundancy in Combinational Logic

Observations From Design Technology

Combinational Logic Verification: Binary Decision Diagrams

Use of BDDs for Verification

Use of BDDs for Verification

Use of BDDs for Verification

Mapping BDD to MOS Circuit

Observations From Design Technology

Sequential Circuits: Controllability & Observability

Full Scan Design

Synthesis Procedure for Fully-Testable Non-Scan Finite-State Machine (Devadas, et.al. 1988)

Synthesis Procedure for Fully-Testable Non-Scan Finite-State Machines

Latest Method for FSM Equivalence

What Has Been Achieved?

Application to Software

Hardware/Software Co-Design

Java-as-a-Syntax for Embedded Systems

The JavaTime Approach

JavaTime Development Environment

Summary

Author: Richard Newton

Email: rnewton@ic.eecs.berkeley.edu

Home Page: http://www-cad.eecs.berkeley.edu/~newton