Issues Treated as Orthogonal

• Gate and interconnect delay-modeling

  • Typically a function of
    • Intrinsic gate delay
    • Input slew rate
    • Output capacitance - lumped/distributed
      • Estimated
      • Extracted
    • Process, voltage, temperature

• Clocking issues

  • Regimes: single-phase, two-phase, multi-phase
  • overlapping, non-overlapping
  • qualified clocks, clock skew

• Deep sub-micron effects - crosstalk

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