Tri-State and Open-Collector

Logic States: "0", "1"

Don't Care/Don't Know State: "X" (must be some value in real circuit!)

Third State: "Z" — high impedance — infinite resistance, no connection

Tri-state gates: output values are "0", "1", and "Z"

additional input: output enable (OE)

When OE is high, this gate is a non-inverting "buffer"

When OE is low, it is as though the gate was

disconnected from the output!

This allows more than one gate to be connected to the

same output wire, as long as only one has its

output enabled at the same time

Non-inverting buffer's

timing waveform

"Z"

"Z"

The Third State

A

X

0

1

OE

0

1

1

F

Z

0

1

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