Procedurally data-driven machines (no "data flow machines"): a whole new
paradigm

                         Reiner W. Hartenstein
                       Kaiserslautern University
                        hartenst@rhrk.uni-kl.de

Summary

Coarse grain reconfigurable datapaths (no FPGAs!) become feasible with
coming deep submicron technology and promise substantially higher
speed-up than the techniques currently used to speed-up processors. But
the so-called von Neumann paradign does not support reconfigurable data
paths. Whenever datapaths are changed by reconfiguration, a new
instruction sequencer is needed: the processor architecture falls apart. 

A new machine paradigm is needed which does not use instruction
sequencers. The proposed talk introduces another machine paradigm, which
is the counterpart to the "von Neumann" paradigm. It also outlines a new
compilation paradigm, which comes along with this hardware platform,
since it is needed. This methodological framework also introduces new
speed-up mechanisms.