Multiprocessors Should Support Simple Memory Consistency Models

Mark D. Hill

Computer Sciences Department
University of Wisconsin-Madison
1210 West Dayton St.
Madison, WI 53706 USA

Abstract

Are you an author of low-level software or a multiprocessor hardware
implementor/verfier?  Do memory consistency models make your head hurt and
distract you the the software or hardware issues that you want to tackle?
I was among those who inflicted relaxed memory consistency models on you
so that you could see higher performance than with sequential consistency.

I have repented.  This talk argues that multiprocessors should implement
sequential consistency or, in some cases, a model that just relaxes
the ordering from writes to reads. I argue against using aggressively
relaxed models because, with the advent of speculative execution, these
models do not give a sufficient performance boost to justify exposing
their complexity to the authors of low-level software.  This talk is
based on a Cybersquare piece that appears in August 1998 IEEE Computer.