1. Some architectures portray the execution environment as one in which interrupts happen precisely: At an interrupt, all previous (non-exceptional) instructions have completed entirely, and none of the following instructions have been executed.
In reality, a pipelined architecture will have to go to some trouble to give this impression. Instructions prior to the exceptional one which are in progress but which have not completed must be fully executed, thus requiring a delay of the interrupt until the pipeline clears. Any following instructions which have begun must be aborted or backed out.
2. Some architectures aim for a restartable environment in which carefully disciplined software can patch up that which may have gone awry, and then continue (or not).
3. A far more elaborate approach is used by the DEC Alpha: trap barriers.
Consider dividing all programs using floating point into fp-basic blocks: one entrance, one exit, and no fp registers reused within the block. At the entry or exit from a fp-basic block, execute a trap barrier instruction trapb, which guarantees that all previous arithmetic instructions complete without traps before continuing.
(There are also exception barrier and memory barrier instructions)
This guarantee could be issued rather inexpensively if no arithmetic instructions are allowed to trap; if such traps are possible, the pipeline would presumably have to empty, and the sticky flags could then be tested. Some speculative pre-execution after the trapb might be allowed. Since at least some Alpha architecture treats gradual underflow in the IEEE 754 model via traps, the trapb can be costly in IEEE mode.
Once control is transferred to the trap handler, sufficient information is generally available to continue after replacing the result of an operation, or replacing the operands. The continuation may be from the point of the exception or somewhere else. (some systems are not so careful, e.g. CDC and Cray, assume that the moral equivalent of ``quit''is the only reasonable continuation of interest.)