I believe that modern digital designers must have broad knowledge of the entire design stack, from devices to software. My research is focused on fine-grained adaptive voltage scaling for energy-efficient processor systems.

I led the Hurricane (nee Raven) project team. We designed several processor SoCs with fine-grained AVS. We taped out a test-chip in 28nm FD-SOI in September 2013. It worked pretty well, so we taped out a few more.

In 2014 I interned at NVIDIA Research. I designed a new circuit for asynchronous boundary crossings based on pausible clocks.

I am a user and proponent of tools for open-source hardware design such as RISC-V, an open ISA, and Chisel, a better hardware description language.

For a more thorough accounting of prior work, click here.

Teaching and Outreach

In Fall 2015, I was on the teaching staff for the pilot of EE16B, a part of the new introductory electrical engineering course sequence at Berkeley.

In Fall 2013, I was the GSI for Computer Science 250, VLSI Systems Design. I redesigned the course labs to better align the course with the ASPIRE hardware vision.

I served for two years as the fearless leader of Electrical Engineering Outreach @ Berkeley. We orchestrate science demos for students at underserved Bay Area schools. Contact me if you're interested in getting involved or in a visit to your classroom.

I taught two years of Algebra II at Cesar Chavez High School in Washington, DC.


I grew up in New England and studied engineering at Harvey Mudd College, a small, highly-rated technical school in Southern California (I was advised by David Money Harris). I enjoy hiking, politics, and board games that are too long.

Most of my salary as a graduate student has been paid by the federal government. Thanks, American readers, for your support.

This page was last updated 6/17.