Recent & Upcoming Talks

2021

Generator-Based Design of Custom Systems-on-Chips for Numerical Data Analysis

With the end of Moore's Law and Dennard scaling, the continuous demand for higher computing performance and efficiency is increasingly …

Jun 30, 2021 3:30 PM Berkeley, CA, USA

Slides

Vertically Integrated Computing Labs Using Open-Source Hardware Generators and Cloud-Hosted FPGAs

The design of computing systems has changed dramatically over the past decade, but most courses in advanced computer architecture …

May 28, 2021 6:00 PM Daegu, Korea

Secondary Use of DNN Accelerators on Edge SoCs (BLAS on Gemmini)

Deep learning models are often accompanied by additional numerical data analysis tasks such as clustering, dimensionality reduction, …

May 26, 2021 10:40 AM Virtual

Chipyard: An Integrated SoC Design, Simulation, and Implementation Environment - Release 1.4 Updates

Continued improvement in computing efficiency requires functional specialization of hardware designs. Agile design methodologies have …

Jan 15, 2021 9:00 AM Virtual

2020

Poster: Chipyard – Integrated Design, Simulation, and Implementation of Custom RISC-V SoCs

We present Chipyard - an open-source integrated SoC design, simulation, and implementation environment for specialized RISC-V compute …

Aug 16, 2020 8:00 AM Virtual Hot Chips

Tutorial on FireSim and Chipyard: End-to-End Architecture Research with RISC-V SoC Generators, Agile Test Chips, and FPGA-Accelerated Simulation on Amazon EC2 F1

Chipyard is a one-stop shop for generating complex RISC-V SoCs, including in-order and out-of-order processors, uncore components, …

Mar 16, 2020 9:00 AM Lausanne, Switzerland

Tutorial: Chipyard and FireSim: End-to-End Architecture Exploration with RISC-V SoC Generators, FPGA-Accelerated Simulation and Agile Test Chips

This tutorial will introduce the Chipyard and FireSim frameworks for the purposes of full-stack architecture exploration and digital …

Jan 30, 2020 2:00 PM Western Digital, Milipitas, CA, USA

Chipyard: An Integrated SoC Design, Simulation, and Implementation Environment

Continued improvement in computing efficiency requires functional specialization of hardware designs. Agile design methodologies have …

Jan 13, 2020 4:50 PM Monterey, CA, USA

2019

Tutorial: Chipyard and FireSim: End-to-End Architecture Exploration with RISC-V SoC Generators, FPGA-Accelerated Simulation and Agile Test Chips

This tutorial will introduce the Chipyard and FireSim frameworks for the purposes of full-stack architecture exploration and digital …

Dec 12, 2019 12:00 AM San Jose, CA, USA

Tutorial on FireSim and Chipyard: End-to-End Architecture Research with RISC-V SoC Generators, Agile Test Chips, and FPGA-Accelerated Simulation on Amazon EC2 F1

Chipyard is a one-stop shop for generating complex RISC-V SoCs, including in-order and out-of-order processors, uncore components, …

Oct 12, 2019 12:00 AM Columbus, OH, USA

Full-System Computer Architecture Using Open-Source Hardware and FPGA-Accelerated Simulation

In this talk, I will describe several research projects developed in the Berkeley Architecture Research group which utilize …

Jun 16, 2019 12:00 AM Jerusalem, Israel

Full-System Computer Architecture Using Open-Source Hardware and FPGA-Accelerated Simulation

In this talk, I will describe several research projects developed in the Berkeley Architecture Research group which utilize …

Jun 12, 2019 12:00 AM Haifa, Israel

Nested-Parallelism PageRank on RISC-V Vector Multi-Processors

Graph processing kernels and sparse-representation linear algebra workloads such as PageRank are increasingly used in machine learning …

May 10, 2019 12:00 AM Phoenix, AZ, USA

FireSim: Open-Source Easy-to-use FPGA-Accelerated Cycle-Exact Hardware Simulation in the Cloud

We present FireSim, an easy-to-use, open-source, FPGA-accelerated cycle-accurate hardware simulation platform that runs on Amazon EC2 …

May 4, 2019 12:00 AM Portland, OR, USA

2018

Tutorial: Easy-to-use, FPGA-Accelerated Hardware Simulation of RISC-V Hardware Designs with FireSim on Amazon EC2 F1

We present a tutorial for FireSim (https://fires.im), an easy-to-use, open-source, FPGA-accelerated cycle-accurate hardware simulation …

Dec 3, 2018 12:00 AM Santa Clara, CA, USA

FireSim Intensive

We present an intensive session for FireSim (https://fires.im), an easy-to-use, open-source, FPGA-accelerated cycle-accurate hardware …

Nov 14, 2018 12:00 AM Berkeley, CA, USA

Recent & Upcoming Talks

2021

Generator-Based Design of Custom Systems-on-Chips for Numerical Data Analysis

Vertically Integrated Computing Labs Using Open-Source Hardware Generators and Cloud-Hosted FPGAs

Secondary Use of DNN Accelerators on Edge SoCs (BLAS on Gemmini)

Chipyard: An Integrated SoC Design, Simulation, and Implementation Environment - Release 1.4 Updates

2020

Poster: Chipyard – Integrated Design, Simulation, and Implementation of Custom RISC-V SoCs

Tutorial on FireSim and Chipyard: End-to-End Architecture Research with RISC-V SoC Generators, Agile Test Chips, and FPGA-Accelerated Simulation on Amazon EC2 F1

Tutorial: Chipyard and FireSim: End-to-End Architecture Exploration with RISC-V SoC Generators, FPGA-Accelerated Simulation and Agile Test Chips

Chipyard: An Integrated SoC Design, Simulation, and Implementation Environment

2019

Tutorial: Chipyard and FireSim: End-to-End Architecture Exploration with RISC-V SoC Generators, FPGA-Accelerated Simulation and Agile Test Chips

Tutorial on FireSim and Chipyard: End-to-End Architecture Research with RISC-V SoC Generators, Agile Test Chips, and FPGA-Accelerated Simulation on Amazon EC2 F1

Full-System Computer Architecture Using Open-Source Hardware and FPGA-Accelerated Simulation

Full-System Computer Architecture Using Open-Source Hardware and FPGA-Accelerated Simulation

Nested-Parallelism PageRank on RISC-V Vector Multi-Processors

FireSim: Open-Source Easy-to-use FPGA-Accelerated Cycle-Exact Hardware Simulation in the Cloud

2018

Tutorial: Easy-to-use, FPGA-Accelerated Hardware Simulation of RISC-V Hardware Designs with FireSim on Amazon EC2 F1

FireSim Intensive

2017

Preventing Babel: Rectifying the Trend of Programming Language Divergence

Designing a RISC-V Graph Processor - Challenges and Insights

Graph Processing - Efficient Acceleration of Graphs at Low Energy