Recent & Upcoming Talks

2020

Poster: Chipyard – Integrated Design, Simulation, and Implementation of Custom RISC-V SoCs

We present Chipyard - an open-source integrated SoC design, simulation, and implementation environment for specialized RISC-V compute …

Tutorial on FireSim and Chipyard: End-to-End Architecture Research with RISC-V SoC Generators, Agile Test Chips, and FPGA-Accelerated Simulation on Amazon EC2 F1

Chipyard is a one-stop shop for generating complex RISC-V SoCs, including in-order and out-of-order processors, uncore components, …

Tutorial: Chipyard and FireSim: End-to-End Architecture Exploration with RISC-V SoC Generators, FPGA-Accelerated Simulation and Agile Test Chips

This tutorial will introduce the Chipyard and FireSim frameworks for the purposes of full-stack architecture exploration and digital …

Chipyard: An Integrated SoC Design, Simulation, and Implementation Environment

Continued improvement in computing efficiency requires functional specialization of hardware designs. Agile design methodologies have …

2019

Tutorial: Chipyard and FireSim: End-to-End Architecture Exploration with RISC-V SoC Generators, FPGA-Accelerated Simulation and Agile Test Chips

This tutorial will introduce the Chipyard and FireSim frameworks for the purposes of full-stack architecture exploration and digital …

Tutorial on FireSim and Chipyard: End-to-End Architecture Research with RISC-V SoC Generators, Agile Test Chips, and FPGA-Accelerated Simulation on Amazon EC2 F1

Chipyard is a one-stop shop for generating complex RISC-V SoCs, including in-order and out-of-order processors, uncore components, …

Full-System Computer Architecture Using Open-Source Hardware and FPGA-Accelerated Simulation

In this talk, I will describe several research projects developed in the Berkeley Architecture Research group which utilize …

Full-System Computer Architecture Using Open-Source Hardware and FPGA-Accelerated Simulation

In this talk, I will describe several research projects developed in the Berkeley Architecture Research group which utilize …

Nested-Parallelism PageRank on RISC-V Vector Multi-Processors

Graph processing kernels and sparse-representation linear algebra workloads such as PageRank are increasingly used in machine learning …

FireSim: Open-Source Easy-to-use FPGA-Accelerated Cycle-Exact Hardware Simulation in the Cloud

We present FireSim, an easy-to-use, open-source, FPGA-accelerated cycle-accurate hardware simulation platform that runs on Amazon EC2 …

2018

Tutorial: Easy-to-use, FPGA-Accelerated Hardware Simulation of RISC-V Hardware Designs with FireSim on Amazon EC2 F1

We present a tutorial for FireSim (https://fires.im), an easy-to-use, open-source, FPGA-accelerated cycle-accurate hardware simulation …

FireSim Intensive

We present an intensive session for FireSim (https://fires.im), an easy-to-use, open-source, FPGA-accelerated cycle-accurate hardware …

2017

Preventing Babel: Rectifying the Trend of Programming Language Divergence

Throughout the history of computers, there has been a proliferation of new programming languages. Programmers have a variety of …

Designing a RISC-V Graph Processor - Challenges and Insights

Graph processing has been a recent topic of interest in the high performance computing and systems community in the context of data …

Graph Processing - Efficient Acceleration of Graphs at Low Energy

Graph processing has been a recent topic of interest in the high performance computing and systems community in the context of data …