HOT INTERCONNECTS SYMPOSIUM V 1997
Sponsored by the Technical Committee on
Microprocessors and Microcomputers of
the
IEEE Computer Society.
A Symposium on High Performance Interconnects
August 21-23, 1997, Kresge Auditorium, Stanford University, Stanford, CA
PROGRAM RECORD
Thursday, August 21, 1997
8:30-8:45 Welcome and Opening Remarks
8:45-9:45 Networking Keynote Presentation:
Evolution of High Speed Networking,
Robert E. Kahn, President, Corporation for National Research
Initiatives
9:45-10:45 Network I/O
- Network-Attached Commodity Storage for Scalable Bandwidth,
Garth A. Gibson and David F. Nagel, Carnegie Mellon University
- Servernet SAN I/O Architecture,
Robert W. Horst and Dave Garcia, Tandem Computers, Inc.,
(postscript)
10:45-11:15 Break
11:15-12:15 Cluster Computing
- High-Performance Cluster Computing using SCI,
Maximilian Ibel, Klaus E. Schauser, Chris J. Scheiman, and Manfred Weis,
University of California, Santa Barbara
(postscript)
- A General-Purpose Protocol Architecture for a Low-Latency, Multi-gigabit
System Area Network,
Brent N. Chun, Alan M. Mainwaring, and David E. Culler
(postscript)
12:15-1:30 Lunch
1:30-3:30 Network Interfaces
- A Case for Making Network Interfaces Less Peripheral,
Shubhendu S. Mukherjee and Mark D. Hill, University of Wisconsin-Madison
(postscript)
- Incorporating Memory Management into User-Level Network Interfaces,
Matt Welsh, Anindya Basu, Thorsten von Eicken, Cornell University
(postscript)
- API and Performance of VMMC-2,
Cezary Dubnicki, Angelos Bilas, Yuqun Chen, Stefanos Damianakis, and Kai
Li, Princeton University
(postscript)
- The Virtual Interface Architecture,
Dave Dunning and Greg Regnier, Intel Corporation
(postscript)
3:30-4:00 Break
4:00-5:30 Bandwidth to the Home: Technical Session
- Satellites, J. Justiss, Hughes Communications Inc.
(postscript)
- Cable, M. Labauch, COM21
- Digital Subscriber Loop, John Cioffi, Stanford
(powerpoint)
5:30-7:30 Reception and Buffet Dinner
Wine and Cheese sponsored by .
Dinner sponsored by .
7:30-9:30 Bandwidth to the Home: Evening Panel
Moderated by: Robert E. Kahn, President, Corporation for National
Research Initiatives
- Satellites, Ed Fitzpatrick, Hughes Communications Inc.
- Cable, Milo Medin, @Home
- Digital Subscriber Loop, Glen Estes, Telesys Technology Lab
- Microwave, Mike Pettus, Metricom
- Users, Martin Haeberli, Netscape
Friday August 22, 1997
8:30-9:30 Signalling Keynote Presentation:
The Limits of Electrical Signalling,
Mark Horowitz, Stanford University
9:30-10:30 Symmetric Multiprocessors
- Profusion, a Buffered, Cache-Coherent Crossbar Switch,
George White and Pete Vogt, Corollary, Inc.
(postscript)
- A Uniform-Memory-Access Interconnect for a Very Large SMP System,
Alan Charlesworth, Andy Phelps, and Gary Gilbert, Sun Microsystems, Inc.
(postscript)
10:30-11:00 Break
11:00-12:30 Optical Signalling Technology
- A "Seamless Migration" to VCSEL-Based Optical Data Links,
C.R. Theorin, S.P. Kilcoyne, F.H. Peters, R.D. Martin, and M.N. Donhowe,
W.L. Gore Inc.
- An Introduction to the CEEPO Project (Cost-Effective Embedding of
High-Performance Interconnects),
Dr. Yue Liu, Honeywell
- TDM 100Gbits/s Packet Switching in an Optical ShuffleNet,
B.Y. Yu, R. Runser, P. Toliver, K.-L. Deng, D. Zhou, T. Chang, S.W. Seo,
K. Il. Kang, I. Glesk, and P.R. Prucnal, Princeton University
12:30-2:00 Lunch
2:00-4:00 Electrical Signalling Technologies
- 1GT/s Back Plane Bus (XTL: Crosstalk Transfer Logic) using Crosstalk
Mechanism,
Hideki Osaka, Masaya Umemura, and Akira Yamagiwa, Hitachi Ltd.
- A 2.5Gbit/second Bidirectional Signalling Technology,
Matthew Haycock and Randy Mooney, Intel Corporation.
(postscript)
- A Tracking Clock Recovery Receiver for 4Gb/s Signalling,
John Poulton, University of North Carolina at Chapel Hill
William J. Dally, MIT
(postscript)
- An Asymmetric Serial Link Architecture for High-Bandwidth Packet
Switches,
Ken K.-Y. Chang, William Ellersick, Shang-Tse Chuang, Stefanos
Sidiropoulos, Mark Horowitz, Nick McKeown, Stanford University
Martin Izzard, Texas Instruments
(postscript)
4:00-4:30 Break
4:30-6:30 Routers
- The WARRP Router,
Timothy Mark Pinkston, Yungho Choi, and Mongkol Raksapatcharawong,
University of Southern California
(postscript)
- Design of a Scalable IP Router,
Vibhavasu Vuppala and Lionel M. Ni, Michigan State University
(postscript)
- IP Switching and Gigabit Routers,
Peter Newman, Ipsilon
(postscript)
- The ATLANTA Chipset: A Low-Cost Scalable VLSI Solution for
High-Performance ATM Switching Systems,
Fabio Chiussi, Joseph Kneuer, and Vijay Kumar
(postscript)
6:30-6:45 Closing Remarks
This is an advance program. Sessions and papers may be dropped, added, or moved between days.
Saturday August 23, 1997 - Tutorials
8:30 - 12:00 Infrared Wireless Communications
Joseph M. Kahn, University of California at Berkeley
The infrared medium is well-suited for high-speed wireless
networking of portable computing devices. Directed and diffuse
infrared systems, operating at bit rates up to 4 Mb/s, are
now commercially available. We discuss current infrared
standards, and present design strategies to achieve bit
rates as high as 100 Mb/s. Topics addressed include:
power-efficient link design, modulation/demodulation
techniques, multipath propagation, and multiple-access
techniques.
8:30 - 12:00 IPng: The Next-Generation Internet Protocol
Robert Hinden, Ipsilon
The Internet Engineering Task Force (IETF) has developed a new version of
the Internet Protocol which is the core protocol in the Internet. IPng,
also known as IP version 6 (IPv6) is designed to meet the challenge of
Internet's continued exponential growth as well as adding important new
features such as "plug and play" auto-configuration, strong security, and
support for real-time traffic. This tutorial will include background on
the why IPv6 was developed, detailed description of the IPv6 protocol,
current status, and a frank discussion of whether it will be deployed.
8:30 - 12:00 The Implementation and Application of Beowulf Class PC Clusters
Please note change in time!
Thomas Sterling, California Institute of Technology
and NASA Jet Propulsion Laboratory
The explosive emergence of Beowulf class PC clusters and other
approaches to "piles of PCs" is offering new opportunities to achieving
moderate to high end computing at unprecedented price performance. This
tutorial describes the means and methodology for exploiting the
ubiquitous availability of the hardware and software building blocks
with their (almost) plug-and-play capability yield a "parts by dawn,
processing by dusk" approach to clustered computing. Included are the
a framework for considering the tradeoffs of alternative elements, the
configuration and installation of ensembles, approaches to applications
programming, and benchmarking results. Notes entitled "How to Build a
Beowulf" will be distributed.
1:30 - 5:00 Virtual Interface Architecture
Chris Dodd, Intel Corporation
The Virtual Interface Architecture for System Area Networks is an
industry-wide effort, lead by Intel, Microsoft, and Compaq, to
standardize on a high performance A{I for cluster communication. This
tutorial consists of two sessions. The first session will cover VI
architectural concepts and services, how architecture meets the needs
of scalable applciations, and the standard API syntax and semantics.
The second session will offer perspectives of several leading
organizations who will be among the first to have products that comply
with the Virtual Interface Architecture specification.
1:30 - 5:00 Optical Interconnect Technologies: A Systems-Level Review
The role of guided-wave and free-space optical interconnect
technologies (OITs) within the intra-cabinet levels of the physical
interconnection hierarchy will be discussed from (1) a wire-replacement
perspective and (2) an architectural enabler perspective. Specifically,
the impact of OITs on parallel processing execution models
will be addressed. Also, current academic and industrial research
efforts will be reviewed and areas in need of future research will be
outlined.
Organizing Committee
General Chair: David E. Culler, UC Berkeley, culler@cs.berkeley.edu
Vice General Chair: Vivian Shen, Hewlett-Packard, vivians@fireworks.hpl.hp.com
Program Co-Chairs: Randy Rettberg, SMCC, randy.rettberg@Eng.Sun.COM and
William Dally, MIT, billd@ai.mit.edu
Treasurer: Qiang Li, Santa Clara University, qli@sunrise.scu.edu
Registration: Jeremy Gorman, TRW, and Yunfung Yang, Santa Clara University
Local Arragements: Nick McKeown, Stanford University, nickm@ee.stanford.edu and
My T. Le, Cisco Systems, myle@cisco.com
Publicity: Weijia Shang, Santa Clara University, wshang@scu.edu
Publication: Steven Fu, CISCO, stevefu@cisco.com
Tutorials: Hasan AlKhatib Santa Clara University, halkhatib@scuacc.scu.edu
Program Committee
Eric Brewer, UCB, Inktomi
Larry Dennison, Avici Systems
Kai Li, Princeton University
Nick McKeown, Stanford University
Craig Partridge, BBN
John Poulton, UNC-CH
Justin Rattner, Intel
Eugen Schenfeld, NEC Research Institute
Steve Scott, Cray Research
David Tennenhouse, MIT, DARPA
Chuck Thacker, Microsoft