Chien-Ting Tung

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I am a Ph.D. candidate in EECS at the University of California, Berkeley. I am a researcher at BSIM  Group and Berkeley Device Modeling Center (BDMC) supervised by Prof. Chenming Hu and Prof. Sayeef Salahuddin. My works focus on the modeling and simulations of emerging devices such as GAAFET, Ferroelectrics, NCFET, STT-MRAM, and RRAM.

I received my BS and MS degree from National Taiwan University. I worked in IOED lab and studied the physics and modeling of transistor lasers.

Current Research Interests

• Compact Models of Ferroelectric Devices
• Compact Models of Nonvolitile Memories
• Neural Network-based Compact Models

Honors & Awards

• Lam Research Thesis Award
• Taiwan-UC Berkeley Fellowship
• The Chinese Institute of Electrical Engineering Thesis Award
• The 2019 Bachelor Degree Thesis Award - NTU
• Presidential Award - NTU
• TSMC Graduate Assistantship - NTU
• TSMC Undergraduate Assistantship - NTU

Selected Publications

• Chien-Ting Tung, Chetan Kumar Dabhi, Sayeef Salahuddin, Chenming Hu, "A versatile compact model of resistive random-access memory (RRAM)," Solid-State Electronics, Volume 220, 2024, 108989, ISSN 0038-1101, https://doi.org/10.1016/j.sse.2024.108989.
• C. -T. Tung, A. Pampori, C. Kumar Dabhi, S. Salahuddin and C. Hu, "A Novel Neural Network-Based Transistor Compact Model Including Self-Heating," in IEEE Electron Device Letters, vol. 45, no. 8, pp. 1512-1515, Aug. 2024, doi: 10.1109/LED.2024.3408151.
• C. -T. Tung, S. Salahuddin and C. Hu, "Non-Quasi-Static Modeling of Neural Network-Based Transistor Compact Model for Fast Transient, AC, and RF Simulations," in IEEE Electron Device Letters, vol. 45, no. 7, pp. 1277-1280, July 2024, doi: 10.1109/LED.2024.3404404.
• C. -T. Tung, A. Dasgupta, H. Agarwal, S. Salahuddin and C. Hu, "A Compact Model of Perpendicular Spin-Transfer-Torque Magnetic Tunnel Junction," in IEEE Transactions on Electron Devices," in IEEE Transactions on Electron Devices, doi: 10.1109/TED.2023.3313997.
• C. -T. Tung and C. Hu, "Neural Network-Based BSIM Transistor Model Framework: Currents, Charges, Variability, and Circuit Simulation," in IEEE Transactions on Electron Devices, doi: 10.1109/TED.2023.3244901.
• C. -T. Tung, M. -Y. Kao and C. Hu, "Neural Network-Based I-V and C-V Modeling With High Accuracy and Potential Model Speed," in IEEE Transactions on Electron Devices, vol. 69, no. 11, pp. 6476-6479, Nov. 2022, doi: 10.1109/TED.2022.3208514.
• C. -T. Tung, G. Pahwa, S. Salahuddin and C. Hu, "A Compact Model of Polycrystalline Ferroelectric Capacitor," in IEEE Transactions on Electron Devices, vol. 68, no. 10, pp. 5311-5314, Oct. 2021, doi: 10.1109/TED.2021.3100814.
• C. -T. Tung, G. Pahwa, S. Salahuddin and C. Hu, "A Compact Model of Ferroelectric Field-Effect Transistor," in IEEE Electron Device Letters, vol. 43, no. 8, pp. 1363-1366, Aug. 2022, doi: 10.1109/LED.2022.3182141.
• C. -T. Tung, S. Salahuddin and C. Hu, "A Compact Model of Antiferroelectric Capacitor," in IEEE Electron Device Letters, vol. 43, no. 2, pp. 316-318, Feb. 2022, doi: 10.1109/LED.2021.3135001.
• C. -T. Tung, G. Pahwa, S. Salahuddin and C. Hu, "A Compact Model of Nanoscale Ferroelectric Capacitor," in IEEE Transactions on Electron Devices, vol. 69, no. 8, pp. 4761-4764, Aug. 2022, doi: 10.1109/TED.2022.3181573.
• C. -T. Tung, G. Pahwa, S. Salahuddin and C. Hu, "A Compact Model of Metal–Ferroelectric-Insulator–Semiconductor Tunnel Junction," in IEEE Transactions on Electron Devices, vol. 69, no. 1, pp. 414-418, Jan. 2022, doi: 10.1109/TED.2021.3130857.
• C. -T. Tung, H. -Y. Lin, S. -W. Chang and C. -H. Wu, "Analytical Modeling of Tunnel-Junction Transistor Lasers," in IEEE Journal of Selected Topics in Quantum Electronics, vol. 28, no. 1: Semiconductor Lasers, pp. 1-8, Jan.-Feb. 2022, Art no. 1501008, doi: 10.1109/JSTQE.2021.3090527.
• Chien-Ting Tung, Shu-Wei Chang, and Chao-Hsin Wu, "Chirp-free optical-signal generation using dual-and-direct current-voltage modulation of transistor lasers," Opt. Lett. 45, 2474-2477 (2020)